• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A memory pool control circuit according to the invention is provided with a CAM (content addressable memory: associative memory) 11. It further has a monitoring module 12, an area releasing module 13, an in-area accessing module 14, an area securing module 15, a search control machine 16, and a timer 17. A plurality of tasks (processes) are operating on a processor 18, and one memory 19 is commonly used by the plurality of tasks (processes). When a task (process) has secured a memory space (called a block here), free areas therein are managed by a group of pointers. A block is divided into a plurality of fixed length fields. A group of flags match the memory space (block) in one-to-one correspondence. The flag group indicate whether or not individual fields are being used, i.e. the flag group indicates whether each individual field is being used or unused (free).
    公开号:CA2293938A1
    申请号:C2293938
    申请日:2000-01-05
    公开日:2000-07-06
    发明作者:Teruo Kaganoi
    申请人:NEC Corp；
    IPC主号:G06F12-02
    专利说明:
    i MEMORY POOL CONTROL CIRCUIT AND MEMORY POOL CONTROL METHODBACKGROUND OF THE INVENTION1. Field of the Invention The present invention relates to a memory pool control circuit and a memory pool control method, and more particularly to a memory pool control circuit and a memory pool control method for managing a shared memory.
    2. Description of the Related Art Various systems in which a plurality of processors or tasks (processes) use one shared memory are commonly known. In such a system, it is required to appropriately manage the shared memory.According to the prior art, in managing a shared memory, memory areas are secured according to the requests of tasks, and it is so arranged that any memory area that is vacated be released.In order to effectively utilize memory areas, there is used a configuration in which a plurality of fixed length fields are put together into a unit (block), and each block is secured as a memory area. In this case, each field in a block may be occupied or unoccupied. Moreover, it is difficult to determine whether a given field in a block is occupied or unoccupied. As a result, even if all the fields in a block become unoccupied, it is difficult to release an intended block. Thus, it is difficult to judge i whether or not a secured memory area can be appropriately released, resulting in a problem that, once a memory area is secured, the memory area cannot be released. SUMMARY OF THE INVENTION An object of the present invention is to provide a memory pool control circuit and a memory pool control method which readily allows to confirm whether or not a given memory area can be appropriately released even where a plurality of fixed length fields put together into a unit (block) and each block is secured as a memory area. A memory pool control circuit according to the invention, intended for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, is provided with an associative memory for storing pointers for managing free areas in a shared memory and storing flags for indicating, for each field, whether or not the field is being used; an area securing circuit for securing a memory space as a secured memory space in compliance with an access to the shared memory and updating the pointers in the associative memory; an in-area access circuit for erecting flags in the associative memory according to the state of use of fields in the secured memory space; and an area releasing circuit for searching the associative memory and releasing the secured memory space if all the fields therein are found free. A memory pool control method according to the invention, i intended for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, comprises an associative storage step to store pointers for managing free areas in a shared memory and flags for indicating, for each field, whether or not the field is being used; an area securing step to secure a memory space as a secured memory space in compliance with an access to the shared memory and to update the aforementioned pointers; an in-area accessing step to update the flags in the associative memory according to the state of use of fields in the secured memory space; and an area releasing step to search the flags and to release the secured memory space if all the fields therein are found free. BRIEF DESCRIPTION OF THE DRAWINGS The above and other obj ects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings wherein: Fig. 1 is a block diagram illustrating one example of memory pool control circuit according to the present invention;Fig. 2 is a diagram illustrating the method of memory pool management in the memory pool control circuit shown in Fig. 1; Fig. 3 is a diagram illustrating the data format in the CAMshown in Fig. l; Fig. 4 is a diagram illustrating the state at the time of i initialization; Fig. 5 is a diagram illustrating the state of use of fields in a block; Fig. 6 is a diagram illustrating fields having come out of use in a block; Fig. 7 is a diagram illustrating the state of use of fields in a block; Fig. 8 is a diagram illustrating the state wherein all the fields in a block are free; Fig. 9 is a diagram illustrating another method of memory pool management in the memory pool control circuit according to the present invention; and Fig.lO is a diagram illustrating still another method of memory pool management in the memory pool control circuit according to the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings. First, one example of memory pool control circuit according to the invention will be described with reference to Fig. 1. The memory pool control circuit of Fig. 1 is provided with a CAM(content addressable memory: associative memory) 11. The memory pool control circuit further has a monitoring module 12, an area releasing module 13, an in-area accessing module 14, an area i securing module 15, a search control machine 16, and a timer 17. In the configuration of Fig. 1, a plurality of tasks (processes) are operating on a processor 18, and one memory 19 is commonly used by this plurality of tasks (processes). Now, with reference also to Fig. 2, when a tasks (process) has secured a memory space (called a block here), free areas therein are managed by a group of pointers (hereinafter called block managing pointers) 1-1. A block 1-2 is divided into a plurality of fixed length fields. A group of flags match the memory space (block) 1-2 in one-to-one correspondence. The flag group 1-3 indicates whether or not individual fields are being used, i . a . the flag group 1-3 indicates whether each individual field is being used or unused (free). Here, as will be described later, the flag group 1-3 is stored in the CAM 11 together with the block managing pointer, and its size (number of words ) is made to be sufficiently for the number of areas to be secured. Further in the pointer group 1-1, (at least) as many block managing pointers as required are readied. In the example shown in Fig. 2, 64 block managing pointers are prepared. As stated above, the block 1-2 is divided into a plurality of fixed length fields, and in each of the fixed length fields is present a pointer for pointing to the next free field. Fig. 3 shows the data format in the CAM (CAM indicator). As illustrated, the CAM indicator has a flag (valid/invalid flag) i 2-1 indicating whether or not a pertinent word is valid or invalid, a flag (used/free indicator) 2-2 indicating whether each field in the block is being used or free, and a pointer (block head pointer) 2-3 indicating the actual position of the memory space matching the flag represented by the pertinent word. Referring to Figs . 1 through 3, how a memory area is secured and released by a single task (process) where a plurality of tasks (processes) commonly use a shared memory space will be described. Every time a task on the processor 18 accesses the memory 19, the monitoring module 12 is monitoring the state of accessing. And the monitoring module 12 provides the memory state of accessing to the in-area accessing module 14 and the area securing module 15. Areas are secured in units of memory spaces (blocks) each consisting of a plurality (20 in the example of Fig. 2) of consecutive fixed length fields . Now it is supposed the size of a field to be secured is a predetermined value ( r-size ) . At the time of initialization, all the block managing pointers 1-1 indicate NULL (invalid), the whole CAMl-3 is in an INVALID(unused) state, and all the pointers 2-3 also indicate NULL (see Fig.4). Now if a task n requires a memory space of r-size bytes, i . a . the monitoring module 12 becomes aware of the state of the use of the memory space by the task n, the area securing module i 15 accesses the CAM 11 to secure one block of areas for a plurality of (20 here) consecutive r size fields, and causes the leading pointer of each field in the block to point to the next field. As the first field in the secured area is used, the n-th block managing pointer points to the first unused space in the block (the second field from the left in Fig. 2). When one block is secured, the in-area accessing module 14 validates one word in the CAM 11, and writes into the pointer field thereof the address of the leading position of the secured block.Further the in-area accessing module 14 erects a flag according to the state of use of fields in the block (here "1" is erected in the first field: see Fig. 5). When a memory space so far used is vacated, the in-area accessing module 14 points the vacated field with the n-th block managing pointer, and writes the address so far indicated by the n-th block managing pointer into the pointer part of the vacated field. Thus the vacated field is inserted into the leading position of the list structure managing free fields composed of the n-th block managing pointer.Further, the in-area accessing module 14 turns the used/free flag for the pertinent field on the CAM into a free state (see Fig. 6) . Fig. 6 shows a case in which the leading and second fields in the block have been used and the leading field is vacated. Now, when all the whole area (block) secured by a task have i come into use, a new block is made ready. As stated above, one block of area consisting of a plurality (20 here) of r_size fields are secured, and the leading pointer of each field in the block is caused to point to the next field. Used fields in the secured area are skipped, and the n-th block managing pointer points to the first unused space in the secured block. As soon as the block is secured, one new word in the CAM is validated, and the address of the leading position of the secured block is written into the pointer field therein. Further, a flag is erected according to the state of use of fields in the block (see Fig. 7). Then, by repeating the above-described actions, the state illustrated in Fig. 2 is achieved. When a secured area (block) is to be released in such a state, the searching function of the CAM is used to check whether or not the block can be released. Now with reference to Fig. 1, a search trigger is supplied from the timer 17 at preset intervals of time, and this search trigger is provided to the search control machine 16. The search control machine 16, in response to the search trigger, searches the CAM 11 via a searching port. More specifically, the search control machine 16 confirms the release of the block by searching flags of the CAM 11 with respect to the once secured block and the state of use of fields therein. For instance, the search control machine 16 periodically (every time it receives a search i trigger) searches for any valid block all of whose fields are free by using VALID state flags and used/free flags as search keys. When any such block is found existing, its address is given to the area releasing module 13 as releasable address. The area releasing module 13 releases the pertinent block in accordance with the releasable address (Fig. 8 illustrates a state in which all the fields in a block have become free). By checking the presence of any releasable block periodically by using the search function of the CAM in this manner, it is made possible to find releasable blocks at very high speed. In the above-described example, releasable blocks were searched at prescribed intervals . This example is not the only feasible one, but releasable blocks may be searched every time an area is acquired or released (returned to a free state). Aconceivable alternative is such that, for instance, a superior unit (e. g., a processor) monitors for free areas in the shared memory space, and when any free area drops below a prescribed capacity, the superior unit gives a trigger to the area releasing module to have the memory released ( i . a . , it is also acceptable to search flags in the associative memory and decides whether or not a secured memory space is to be released according to the stage of the pertinent flag) . Or, memory releasing may be accomplished every time a shared memory space is accessed ( i . a . flags in the associative memory are searched every time a shared memory space i is accessed and it is decided whether or not a secured memory space is to be released according to the stage of the pertinent flag) . Incidentally, thememory control circuit illustratedin Fig.1 is operating independently of securing of an area by a task (process) . By providing a circuit for area releasing as shown in Fig. 1, the processing load on the task (process) can be reduced. Next will be described another example (of operation) of the memory control circuit according to the invention with reference to Fig. 9. In the configuration of Fig. 9, there is a pointer indicating the next free field within the block subj ect to area securing but also a pointer indicating the field before its own field was pointed to. Updating of this pointer is accomplished at the same time as the updating of the aforementioned pointer. Thus in each field there are used a pointer indicating the next free field and another pointer indicating the field before. This enables the destination of the pointer transfer to be determined simply, when actual releasing is to be accomplished after a releasable block has been found by the searching function of the CAM, without having to searching the list, and accordingly helps save the time required for releasing. Fig. 10 illustrates another example of the memory pool control circuit according to the invention. In the configuration shown in Fig. 10, a register 21, a comparator (Comp) 22 and an i encoder (Encode) 23 are used in place of the CAM 11. In the register 21, configured in the same way as the CAM, is registered a flag whether a pertinent word is valid or invalid. The comparator 22 supplies a flag indicating whether each field in the flag is being used or free according to the content of the register 21. The encoder 23 supplies as a releasable address a pointer indicating the position of the actual memory space corresponding to the flag indicated by the pertinent word. Thus the comparator 22 determines whether or not the pertinent word is valid and, with respect to all the fields in the block, whether they are being used or free, the result of determination being provided to the encoder 23. The encoder 23 encodes the pertinent word to supply a releasable address. Incidentally, by hierarchically using the memory management method according to the invention, not only can a memory pool be managed with a large-scale unit, but also memory management can be accomplished in finer units. As hitherto described, the present invention uses a CAM for the management of a shared memory. As a result, it is possible to check at very high speed, where a plurality of fixed length fields are put together into a single unit block and an area is secured for each block, whether or not a secured block may be released by using the searching function of the CAM. As a result, there is no need to secure memory spaces wastefully, resulting i in the benefit of efficiently using memory spaces by releasing secured areas once they have come out of use. Furthermore, since memory spaces can be released in predetermined units, any need for a large capacity memory space can be adequately need to permit hierarchical memory management, resulting in the benefit of enabling memory areas to be managed in a plurality of kinds of units. While this invention has been described with reference to certain preferred embodiments, it is to be understood that the subject matter encompassed by way of this invention is not to be limited to those specific embodiments. On the contrary, it is intended for the subject matter of the invention to include all alternative, modification and equivalents as can be included within the spirit and scope of the following claims.
    权利要求:
    Claims (13)
    [1] 1. A memory pool control circuit for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, comprising:an associative memory for storing pointers for managing free areas in said shared memory and storing flags for indicating, for each of said fields, whether or not the field is being used;an area securing circuit for securing said memory space as a secured memory space in compliance with an access to said shared memory and updating the pointers in said associative memory;an in-area access circuit for erecting flags in said associative memory according to the state of use of fields in said secured memory space; and an area releasing circuit for searching said associative memory and releasing said secured memory space when all the fields therein are found free.
    [2] 2. The memory pool control circuit, as claimed in Claim 1, wherein:said area securing circuit accesses said associative memory when securing said memory space, and updating the leading pointer of each field in said secured memory space to indicate the next field.
    [3] 3. The memory pool control circuit, as claimed in Claim 1, wherein: said in-area access circuit validates one word in said associative memory when erecting a flag in said associative memory, and writing the address of the leading position of said secured memory space into a pointer field in said one word.
    [4] 4. The memory pool control circuit, as claimed in Claim 3, wherein:said in-area access circuit, when said memory space goes out of use, inserts the unused field into the leading position of a list structure managing free fields.
    [5] 5. The memory pool control circuit, as claimed in Claim 4, wherein:said in-area access circuit turns the used/free flag of the pertinent field on said associative memory into a free state.
    [6] 6. The memory pool control circuit, as claimed in Claim 1, wherein:said area releasing circuit searches flags of said associative memory at predetermined intervals, and determines whether or not to release said secured memory space according to the state of said flags.
    [7] 7. The memory pool control circuit, as claimed in Claim 1, wherein:said area releasing circuit searches flags of said associative memory in accordance with triggers provided from a superior apparatus, and determines whether or not to release said secured memory space according to the state of said flags.
    [8] 8. The memory pool control circuit, as claimed in Claim 1, wherein:said area releasing circuit searches flags of said associative memory every time said shared memory is accessed, and determines whether or not to release said secured memory space according to the state of said flags.
    [9] 9. A memory pool control method for managing a shared memory divided into memory spaces each having a predetermined plurality of fields, comprising:storing pointers for managing free areas in a shared memory and flags for indicating, for each field, whether or not said field is being used;securing said memory space as a secured memory space in compliance with an access to said shared memory and to update said pointers;updating said flags in said associative memory according to the state of use of fields in said secured memory space; and releasing said secured memory space when all the fields therein are found free after searching said flags.
    [10] 10. The memory pool control method, as claimed in Claim 9, wherein:said securing includes updating, when said memory space is secured, the leading pointer of each field in said secured memory space to indicate the next field.
    [11] 11. The memory pool control method, as claimed in Claim 9, wherein:said releasing includes searching flags of said associative memory at predetermined intervals, and determining whether or not to release said secured memory space according to the state of the pertinent flag.
    [12] 12. The memory pool control method, as claimed in Claim 9, wherein:said releasing includes searching flags of said associative memory in accordance with triggers provided from a superior apparatus, and determining whether or not to release said secured memory space according to the state of said flags.
    [13] 13. The memory pool control method, as claimed in Claim 9, wherein:said releasing includes searching flags every time said shared memory is accessed, and determining whether or not to release said secured memory space according to the state of said flags.
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    同族专利:
    公开号 | 公开日
    JP3267574B2|2002-03-18|
    JP2000200211A|2000-07-18|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    JPH0431416B2|1985-11-19|1992-05-26|||
    JPH0392941A|1989-09-06|1991-04-18|Hitachi Ltd|Area management system|
    JPH05189299A|1992-01-09|1993-07-30|Nippon Telegr & Teleph Corp <Ntt>|Memory management device|WO2009133722A1|2008-04-30|2009-11-05|日本電気株式会社|Interprocess communication system, shared memory used in communication, and communication method|
    法律状态:
    2000-01-05| EEER| Examination request|
    2004-01-05| FZDE| Dead|
    优先权:
    申请号 | 申请日 | 专利标题
    JP00097799A|JP3267574B2|1999-01-06|1999-01-06|Memory pool control circuit|
    JP977/1999||1999-01-06||
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